Virtual Prototyping and Design Validation with COREsim

To completely define a system, one must precisely specify the behavior model detailing the functional and control flows, the inputs and outputs, the physical architecture model, and the performance model.

The inputs to this process include requirements, and the outputs include a system design model. The system design model must satisfy all the requirements in a logical manner so that the system is dynamically consistent. If the behavioral model is flawed and not corrected during the initial design stages, problems will likely multiply during development. Inevitably, when achievement of dynamic consistency is left until the end of a project (during integration and testing), it is the least attainable and the most costly to correct. An automatically generated dynamic verification simulator can help identify flaws early in the development cycle.

COREsim is a simulation engine embedded in all versions of CORE that provides this automatic dynamic verification of operational and/or behavior models constructed as part of a system, architecture, program, or process definition in CORE. COREsim provides the ability to evaluate designs from two perspectives:

1. Correct logical behavior - verify that the design as modeled will in fact execute logically and that activities and functions will occur in the sequence intended. This is of particular importance as an architecture or system design grows more complicated with multiple layers of decomposition and many parallel tasks.  As designs grow more complex, it becomes difficult or impossible to validate logical behavior through visual inspection alone. Execution of behavior in COREsim can and should be a significant contributor to the task of verification of your logical designs.
2. System/architecture performance - real-world limitations on (and competition for) resources, architecture design selection, and functional allocation can all act to constrain the overall performance of a chosen solution. These constraints can be captured in the CORE model and their aggregate effects on performance evaluated by executing behavior models in COREsim. Process queuing, resource utilization, and communications bandwidth are some of the examples of what can be seen across a timeline, with the results utilized to correct and/or optimize architecture and system designs.

A fundamental benefit of using COREsim is the automatic generation of a simulation from the system operational or functional model ensuring that the simulation model and system functional model remain consistent. If changes are made to the simulator, those changes are automatically reflected in the system model.  This differs from classic stand-alone simulators in which the simulation itself is tuned with changes often not reflected in the system specification. The net result is virtual prototyping at the system level directly from the system model.

COREsim is important enough to have its own document, the COREsim User Guide available from the Help>>Documentation menu. It's easy to get started, and the power scales. You can simulate your model literally from the first minute and gain value but the value goes much further.   If you are interested in truly leveraging the embedded and automated validation present with COREsim as well as the ability to virtual prototype at the system model level, review the guide or contact the Vitech team for further information.